A.3. QA checklist

This quality assurance checklist can be used to verify the compliance of a footprint to the bedrock-rnd guidelines. There are two levels of compliance: to get included in the bedrock-rnd library all checks must be passed; to have a high quality footprint that complies with this document but does not get included in bedrock-rnd, some checks can be failed or passed with alternative approach. These alternatives are written in italic, often just stating that a check is (optional).

Each row starts with an [id] that identifies the row. This is used instead of numbering so that if new checks are inserted later the ids will not change.

While the table blow is designed for manual verification with a checkbox provided in the last column, most of these test can be automated.

Type, format	ok
[type] parametric for family, static file for special (optional)
[awk] parametric footprint is written in awk and is portable (optional)
[name] reasonable footprint name, no collision with existing bedrock-rnd footprint name (optional)
[format] footprint is in lihata subcircuit >=v6 format (or in tEDAx)

Metadata	ok
[generator] has the generator attribute if generated
[datasheet] has the datasheet attribute
[ds-archive] datasheet URL points to archive.org
[standard] has the standard attribute and lists bedrock-rnd with the correct ::version
[license/dist1] has a license/dist attribute with a known license or URL
[license/dist2] dist license is acceptable for bedrock-rnd (optional)
[license/use1] has a license/use attribute with a known license or URL
[license/use2] use license is "unlimited" for bedrock-rnd (optional)
[copyright] has a copyright attribute with the name of the author and year (optional)
[version1] has a version attribute (optional)
[version2] version format is yyyy-mm-ddS (optional)
[uuid1] has a proper UUID; uid in lihata or manually generated uuid in other formats (optional)
[uuid2] UUID format is minuid (optional)
[density] has a density attribute that is valid and matches the footprint (optional)

Centroid/orientation	ok
[centroid] centroid placement is correct for pnp
[orientation] standard orientation, pin 1 location

Padstacks	ok
[pstk-olap] no unreasonable overlaps
[pstk-rot] no excess duplicate transformed padstacks; padstacks are rotated properly where needed
[pstk-origin] proper padstack origin (along short vs. long side)
[termid] terminal IDs are set
[intconn] intconn is not used when not needed or used exactly as required when needed

Copper	ok
[cop-dim1] copper dimensions are either copied from datasheet's recommended footprint drawing or derived from the component drawing; for footprint-family it must be the latter
[cop-dim2] if component-derived sizes: tolerances are properly accounted for
[cop-round] sharp corner pads except for central pads, have rounding that is not larger than the radius recommended in 3.4.2; except for center pads or when there is a strong, documented reason for deviation
[vias] proper via placement (if there are vias)

Hole/slot (if applicable)	ok
[hole-fin] holes are specified at finished diameter
[hole-unplt] mounting/positional/nosolder holes are not marked plated
[hole-untent] non-plated holes have mask opening to avoid tenting (see 3.4.4.3)
[hole-ringdia] minimum copper diameter (see 3.4.4.1)
[hole-pin1] pin 1 has square ring
[slot-pstk] slot is in a padstack and has round cap line shape
[slot-dia] slot respects minimum diameter (see 3.4.4.2)

Mask	ok
[NSMD] uses NSMD or if not, the reason is strong and documented
[mask-shape] mask shape is the same as copper pad shape; if not, there is a strong, well documented reason
[mask-gap] for NSMD the mask gap is as recommended in 3.5.1 (optional)
[mask-bridge] there is no narrow mask bridge (minimum: 0.1mm)
[mask-row] if there is a mask rectangle over a row of padstacks those padstacks do not have mask shape

Paste	ok
[paste-shape] paste shape is reasonable for the pad shape and contact lead shape
[paste-rounding] no sharp corner: have rounding that is not larger than the radius recommended in 3.4.2; except for center pads or when there is a strong, documented reason for deviation
[paste-size] equal to or slightly smaller than the copper pad; alternatively strong, documented reason (e.g. overhang)
[paste-tune] flat bottom large pad parts (e.g. passives or tabs of power components) have the recommended paste removal on the inner side, see 3.6.2 (optional)
[paste-pattern] large pads (e.g. center pads) have paste pattern instead of a single large rectangle
[paste-via] no paste over unplugged via

Assembly layer	ok
[assy-thick] line thicknesses are as recommended: 0.05mm and 0.025mm (optional)
[assy-view] orthogonal top view
[assy-body] has a reasonable representation of the component body
[assy-pins] has a reasonable representation of pins/leads
[assy-pin1] has a mark for pin1
[assy-size] drawn at the nominal size of the component (optional)
[assy-clean] clean of noise; no objects that are not required by 3.7 (optional)

Silk layer	ok
[silk-thick] line thicknesses are as recommended: 0.2mm for placement, 0.3mm for pin1 dot (optional)
[silk-pin1] pin1 dot is present and is near the right terminal and is outside of component-covered area (optional)
[silk-refdes-flg] refdes text is present and is a dyntext floater (optional)
[silk-refdes-pos] refdes text is outside of the courtyard (optional)
[silk-refdes-hght] refdes text scale is 100% (optional)
[silk-style] no excess placement graphics, no full box/frame, no assy drawing on silk
[silk-cy] placement graphics is entirely under the courtyard

Courtyard	ok
[cy-present] there is a courtyard drawing and it contains only polygons
[cy-base1] courtyard covers all component body parts, pins/leads and exposed copper
[cy-base2] "courtyard is not bbox" and does not cover unreasonable bays that are not really used by the component (optional)
[cy-extent] courtyard extends beyond base size by the recommended value depending on density (optional)
[cy-olap] there are no overlapping or touching courtyard polygons; if there are more than one polygons, they are disjunct and this setup must have a strong, documented reason (optional)

Keepout	ok
[ko-present] keepout is present only when there is a strong, documented reason
[ko-olap] there are no overlapping or touching keepout polygons on the same layer; if there are more than one polygons, they are disjunct (optional)

Glue (normally omitted)	ok
[glue-style] either line or dots, for center indication
[glue-dim] does not extend beyond component body, with a reasonable margin

3D model (not mandatory)	ok
[3d-format] in supported format (OpenSCAD) (optional)
[3d-param] if the footprint is generated or parametric, the model is parametric too and the generated footprint contains matching model parameters
[3d-nom] the 3d model represents nominal component dimensions (optional)
[3d-lic1] the 3d model comes with the same licenses (use and dist) as the footprint
[3d-lic2] the 3d model use-license does not "contaminate" the exported 3D board model when embedded