In many workflows the ultimate source of information is the schematics. However, in later phases of the design there can be changes, for example GPIO pins or slots of multi-slot swapped, footprint changed because of PCB layout constraints.
The back annotation block communicates such changes back to the schematics editor. The schematics editor then either makes the necessary changes to the drawings or assists the user to do those changes.
The schematics (in line with the netlist block) is assumed to built from at least networks and components, components having pins. Each of them have an identifier. Network and component identifiers are unique within the project, pin identifiers are unique within their component.
Furthermore networks, components, pins have attributes, which are key=value pairs. The interpretation of both keys and values are up to the schematics editor.
Fixed attributes are special attributes whose keys are one of those listed in the tables below. Schematics editors are required to support all fixed attributes.
An operation on a fixed attribute may translate into an operation of attributes. The only difference is that the meaning of attribute keys is arbitrary while the meaning of fixed attribute keys is one of a few, tEDAx-specified items. Fixed attributes provide a minimal amount of common API over attributes.
Block type is "backann", version is "v2". The unique identifier could be the purpose of the back annotation.
As lines are read, the reader should build an internal model of the original state of netlist, components, pins and an ordered list of change operations to be carried out. If the original state loaded from the back annotation file doesn't match the current state of the schematics, the schematics editor may refuse the back annotation block.
The order of backann blocks does matter (blocks depend on the outcome of previous blocks).
command | parameter names | explanation |
---|---|---|
net_info | network component pin | The specific pin of component was originally connected to the network named in the first parameter. |
command | parameter names | explanation |
---|---|---|
del_conn | network component pin | The component:pin specified should be removed (disconnected) from the network named in the first parameter. If all connections of a network has been removed, the network shall be removed as well [since backann v2]. |
add_conn | network component pin | The component:pin specified should be added (connected) to the network named in the first parameter. If the network did not exist, create it [since backann v2]. |
attr_conn | network key value | Change a network attribute named in the key parameter to value. If value is missing, remove the attribute. If the attribute did not exist, create it. |
command | parameter names | explanation |
---|---|---|
add_comp | component | Create a component (that did not exist in the last forward annotation). [command introduced in backann v2]. |
del_comp | component | Remove a component. [command introduced in backann v2]. |
attr_comp | component key value | Change a component attribute named in the key parameter to value. If value is missing, remove the attribute. If the attribute did not exist, create it. |
fattr_comp | component key value | Change a component fixed attribute named in the key parameter to value. If value is missing, remove the attribute. If the attribute did not exist, create it. |
Fixed attributes for components are:
key | value |
---|---|
footprint | the footprint name (string) of a component |
value | the value (string) of a component, with or without unit suffix |
command | parameter names | explanation |
---|---|---|
attr_pin | component pin key value | Change a component:pin attribute named in the key parameter to value. If value is missing, remove the attribute. If the attribute did not exist, create it. |
tEDAx v1 begin backann v2 bus\ termination:\ pull\ down\ instead\ of\ pull\ up net_info vcc R3 1 net_info vcc U1 3 net_info gnd U1 2 del_conn vcc R3 1 add_conn gnd R3 1 end backann
Note: any of the net_info line is optional. When present, it may help the schematics editor to detect outdated or mismatching back annotation blocks and may help 3rd party software to visualize the pack.
tEDAx v1 begin backann v2 swap\ GPIOs\ for\ easier\ layout net_info btn3 U1 12 net_info led5 U1 16 del_conn btn3 U1 12 add_conn led5 U1 12 del_conn led5 U1 16 add_conn btn3 U1 16 end backann
tEDAx v1 begin backann v2 shunt\ resistor\ tuning fattr_comp R14 footprint 1206 fattr_comp R14 value 100\ mOhm attr_comp R14 power\ 0.21W attr_comp R14 comment\ layout:\ use\ large\ copper\ pads\ for\ heat\ dissipation end backann
tEDAx v1 begin backann v2 new\ bypass\ cap\ for\ U4 add_comp C31 fattr_comp C31 footprint 0805 fattr_comp C31 value 100n attr_comp C31 placed\ close\ to\ U4 add_conn vcc C31 1 add_conn gnd C31 2 end backann