Focus is on providing a flexible netlist format that potentially conveys enough information to transfer digested schematics data from a schematics capture software to different backend software (e.g. PCB editors, simulators).
This model assumes the source of information is mainly the schematics, and tries to be useful for the flow where the user "forward annotates" circuit information from the schematics to PCB, simulators, etc.
The schematics is made up of networks, components and pins (of components). All of them have an identifier that is a plain text string. The identifier of networks and components are unique within the project. The identifier of a pin is unique within its component.
In version 1 of the block, the netlist is flat.
Block type is "netlist", version is "v1". The unique identifier could be the name of the design.
As lines are read, the reader should build an internal model of the netlist and components. Any object (network, component, pin) is created the first time it is named. Thus order of lines in the block should not matter.
command | parameter names | explanation |
---|---|---|
conn | network component pin | The specific pin of component is connected to the network named in the first parameter. |
nettag | network key value | Add a tag (custom key=value attribute) on a network |
command | parameter names | explanation |
---|---|---|
footprint | component fpname | The specific component's PCB footprint is fpname |
value | component value unit | Set the value of a component, e.g. the resistance of a resistor; the unit field is optional. The semantics and meaning of the value and the unit is implementation specific. This command is used to inform the user only. |
device | component devname | Device name, intended for user display. |
spiceval | component value | The value of the component as specified by spice. |
spicedev | component devtype | Spice device type for simulation |
comptag | component key value | Add a tag on a component |
command | parameter names | explanation |
---|---|---|
pinname | component pin name | Specify an user visible symbolic name of the pin (e.g. "emitter" or "E") |
pinslot | component pin slotnum | For slotted devices, specify in which slot the pin is |
pinidx | component pin idx | Define the index of the pin within the slot (or within the device if there is no pinslot available). No two pin may have the same pin index within the same slot (or device, if there's no pinslot). The index is used to order pins for spice. |
tEDAx v1 begin netlist v1 linear_stab conn gnd U1 2 conn gnd CONN1 1 conn gnd CONN2 1 conn in U1 1 conn in CONN1 2 conn out U1 3 conn out CONN2 2 conn gnd C1 1 conn in C1 2 conn gnd C2 1 conn out C2 2 footprint CONN1 SIP2 footprint CONN2 SIP2 footprint U1 TO220 footprint C1 1206 footprint C2 1206 value C1 100 nf value C2 100 nf device C1 ceramic\ capacitor device C2 ceramic\ capacitor device U1 7805 pinname U1 1 input pinname U1 3 output end netlist