Code size is about 6 KiB on an ARM Cortex-M4.
The implementation requires 6 bytes of static RAM, and some stack space, depending on the configuration. The trade-off here is the "slow" operation speed, due to lack of cache. However, users are free to implement their own cacheing mechanism, if the target machine has enough memory.
You can read the wroncefs specification here.
Release tarballs are available here.
You can use this project according to BSD-3 license.