This tutorial goes through the topic of Circuit Simulation with sch-rnd. More specifically: lumped element simulation using SPICE (various implementations). Since sch-rnd itself does not contain any simulation code, all the methods described here rely on external SPICE simulation software.
As of writing (2023), there are a bunch of proprietary SPICE implementations and a few open source alternatives. This tutorial is focusing on the open source implementations. There are three main open source alternatives:
At the moment sch-rnd recommends using ngspice because that implementation has the most complete support and is the most well-tested with sch-rnd.
Sch-rnd is designed to allow single schematics to be used for different workflows, e.g. both spice simulation and PCB layout. There are various (sometimes optional) abstractions over spice to make this possible.
The low level of simulation are:
For new users the recommendation is: unless you already have a lot of experience with spice, it is better to go for the simulation approach.
The user manual contains a section on simulation.
The tutorial is a system of smallish examples. Each new example adds something and assumes previous examples are understood. The recommended way of reading the tutorial is to pick one of the raw simulator or the high level sim target and click through the examples for that column.
Note: the raw examples are always written for ngspice with considerations for other spice implementations mentioned at the end of each example. The high level simulation works only with ngspice at the moment.
title | raw ngspice | raw gnucap | high level sim | concepts |
---|---|---|---|---|
01_dc | yes | yes | yes | sch-rnd: sheet setup
sim: dc operating point |
04_passive_tr | yes | yes | yes | sim: transient (time domain) analysis, voltage source (pulsed) |
06_passive_ac | yes | yes | yes | sim: ac (frequency domain) analysis |
10_bjt_amp_tr | yes | yes | yes | sch-rnd: spice model, spice pinout
sim: time domain sim and SINE() source |
12_bjt_amp_ac | yes | yes | yes | sch-rnd: spice pinout with portmap
sim: ac analysis |
16_opamp_dc | yes | error | yes | sim: dc sweep |
18_opamp_ac | yes | error | yes | sch-rnd: 2-slot opamp |
22_custom_sym | yes | yes | yes | sch-rnd: symbol inline model card, spice/prefix |
30_mixed | yes | N/S | TODO | sch-rnd: ADC/DAC bridging from terminal attributes
sim: mixed analog+digital |
Legend: