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pcb-rnd - the [intconn] patch

There are parts with internal connections (e.g. pin 2 and 4 of a SO8 package are internally connected). Mainline PCB can not handle this, leaving the following options:

connect both pins to the net from the schematics - this works if all the internally connected pins are required to connect to copper (common with GND or power pins) but is very inconvenient for signal pins where only one of them needs to be connected
back-annotate which pin is connected - there's no easy back annotation
one pin connected, the other is closer to the next target; PCB doesn't understand that they are already connected internally; normally one shouldn't use the internal connection of a component instead of copper; except for the common practice to use 0 ohm SMD resistors for jumping wires

The patch introduces a new pin flag intconn(g) which marks the pin to have internal connections in group g. If there are multiple pins using the same g value within a single element, they are internally connected. In other words, g is a group (or net name) within the element and pins can join to one of the numbered groups (or internal nets). The value of g shall be between 1 and 255, 0 means no internal connection (equivalent to the case when intconn(0) is omitted).

When pin numbers are displayed (key 'd'), internal connection groups are written in square brackets, e.g. "2 [9]" means "pin 2, internally connected to group 9".

Combined with the [nonetlist] patch, this solves the "0-ohm 1206 jumper" problem: the element should be marked as nonetlist, with both pins set intconn(1) - this will result in a 2 pad element, pads internally connected, that can be part of any one network without causing short.

Example

The first image depicts crossing traces, a common problem encountered when rats nesting a new layout from a netlist. One method to resolve such issues is to use a zero ohm jumper resistor that allows one signal trace to 'jump' across another.

The second image shows the layout routing the nonconflicting rats and a open unrouted point where the rat would require one trace to cross another.

In the third image a 1206 SMD footprint for a 0 Ohm 1206 resistor called J1 is placed with an intconn between the two pads which resolves the final rat line.

[Layout with resistors and rat lines]

[Layout with one remaining rat line]

[Layout with jumper completing net]

save/load and compatibility

This patch introduces a new pin flag. In the following example pin 2 and 4 are connected internally as group 9, while pin 3 does not have any internal connections:

Pin[40000 60000 6000 3000 6600 2800 "2" "2" "square,intconn(9)"]
Pin[40000 50000 6000 3000 6600 2800 "3" "3" "square"]
Pin[40000 40000 6000 3000 6600 2800 "4" "4" "square,intconn(9)"]

Mainline PCB will load the design ignoring internal connections - this may introduce new rats.

Mainline PCB doesn't save intconn() and elements are embedded in the file - once the design is loaded and saved with mainline PCB, internal connection info is lost.

plans

No plans - this feature is fully implemented. There is no plan for implementing a GUI, internal connections should be hand-edited into the element.