memory address (16 bits):
	FEDCBA9876543210
	----------------
	00aaaaaaaaaaaaaa         main thread page, sram  (16k)
	01aaaaaaaaaaaaaa         main thread page, flash (16k)
	10aaaaaaaaaaaaaa         interrupt page, sram (16k)
	11aaaaaaaaaaaaaa         interrupt page, flash (16k)


instruction fmt
	FEDCBA9876543210
	----------------
	00iiiiiidddddddd         single operand, immediate immed=d
	01iiiiiiDDDDSSSS         two register operands (32 instructions, access to all 16 regs)
	1iiiiRRRdddddddd         1 reg, 1 immed (16 instructons, access for 8 low regs)


Register table at memory address 0
	0 A (R0)      accumulator
	1 SEG         segment register
	2 SP          stack pointer
	3 FP          frame pointer
	4 R4          general purpose
	5 R5          general purpose
	6 R6          general purpose
	7 R7          general purpose
	8 R8          general purpose
	9 R9          general purpose
	10 R10        general purpose
	11 R11        general purpose
	12 R12        general purpose
	13 R13        general purpose
	14 R14        general purpose
	15 R15        general purpose

Memory addressing:
	If memory is to be read or written by any instruction other than far jump,
	the final 16 bit address is always:

	SEG*256 + addr

	where SEG is the content of the segment register and addr is a 8 bit
	immediate number or 8 bit register data.
	
	Examples:
		Read main thread variable at address 0x1234 into A is:
		ld SEG, 0x12   ; instruction type: reg:immed
		ldpi A, 0x34   ; instruction type: reg:immed

		Write interrupt variable at address 0x8012 into A is:
		ld SEG, 0x08   ; instruction type: reg:immed
		stpi A, 0x12   ; instruction type: reg:immed