Mailing list archives : pcb-rnd

ID:945
From:Else Schlerman <es...@wellesley.edu>
Date:Sun, 8 Oct 2017 11:09:15 -0400
Subject:Re: [pcb-rnd] copy/paste between layouts
in-reply-to:944 from ge...@igor2.repo.hu
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Thank you both!
 
Else
 
On Sun, Oct 8, 2017 at 4:12 AM, <gedau@igor2.repo.hu> wrote:
 
>
>
> On Sun, 8 Oct 2017, gedau@igor2.repo.hu wrote:
>
>
>>
>> On Sat, 7 Oct 2017, John Griessen wrote:
>>
>> Take on pcb-rnd file and edit file-->prefs-->sizes  to be big enough for
>>> both.
>>>
>>> then import layout data to buffer,
>>>
>>> only that I just checked this and bombed.
>>>
>>
>> Thank you, I managed to reproduce it, will debug in the next few hours.
>>
>
> Unfortunately it went deeper than I expected. I found that there is a
> corner case not handled properly by the new layer model.
>
> The real fix would be too drastic for now, in the sense that it would
> affect too many lines of code, posing too much risk on stability and would
> require a lot of user testing - not just in subcircuits, but in layer
> handing in general.
>
> So I decided to add a workaround that will handle most cases for now,
> without the need of the real fix. As of r11970, loading a lihata board to
> buffer should already work, except one thing:
>
> *** if the loaded board contains subcircuits, paste will assert() ***
>
> This is a known bug for now, and will be addressed early in the next
> development cycle.
>
> Regards,
>
> Igor2
>
>
>
>
 
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<div dir=3D"ltr">Thank you both!<div><br>Else</div></div><div class=3D"gmai=
l_extra"><br><div class=3D"gmail_quote">On Sun, Oct 8, 2017 at 4:12 AM,  <s=
pan dir=3D"ltr">&lt;<a href=3D"mailto:gedau@igor2.repo.hu" target=3D"_blank=
">gedau@igor2.repo.hu</a>&gt;</span> wrote:<br><blockquote class=3D"gmail_q=
uote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1e=
x"><div class=3D"HOEnZb"><div class=3D"h5"><br>
<br>
On Sun, 8 Oct 2017, <a href=3D"mailto:gedau@igor2.repo.hu" target=3D"_blank=
">gedau@igor2.repo.hu</a> wrote:<br>
<br>
<blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1p=
x #ccc solid;padding-left:1ex">
<br>
<br>
On Sat, 7 Oct 2017, John Griessen wrote:<br>
<br>
<blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1p=
x #ccc solid;padding-left:1ex">
Take on pcb-rnd file and edit file--&gt;prefs--&gt;sizes=C2=A0 to be big en=
ough for both.<br>
<br>
then import layout data to buffer,<br>
<br>
only that I just checked this and bombed.<br>
</blockquote>
<br>
Thank you, I managed to reproduce it, will debug in the next few hours.<br>
</blockquote>
<br></div></div>
Unfortunately it went deeper than I expected. I found that there is a corne=
r case not handled properly by the new layer model.<br>
<br>
The real fix would be too drastic for now, in the sense that it would affec=
t too many lines of code, posing too much risk on stability and would requi=
re a lot of user testing - not just in subcircuits, but in layer handing in=
 general.<br>
<br>
So I decided to add a workaround that will handle most cases for now, witho=
ut the need of the real fix. As of r11970, loading a lihata board to buffer=
 should already work, except one thing:<br>
<br>
*** if the loaded board contains subcircuits, paste will assert() ***<br>
<br>
This is a known bug for now, and will be addressed early in the next develo=
pment cycle.<br>
<br>
Regards,<br>
<br>
Igor2<br>
<br>
<br>
<br>
</blockquote></div><br></div>
 
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945 Re: [pcb-rnd] copy/paste between layouts from Else Schlerman <es...@wellesley.edu>