Mailing list archives : pcb-rnd

ID:711
From:ge...@igor2.repo.hu
Date:Tue, 30 May 2017 18:15:26 +0200 (CEST)
Subject:Re: [pcb-rnd] up next: subcircuits (a.k.a. footprint model
in-reply-to:710 from John Griessen <jo...@cibolo.com>
replies: 712 from John Griessen <jo...@cibolo.com>
 
 
On Tue, 30 May 2017, John Griessen wrote:
 
> On 05/30/2017 07:21 AM, gedau@igor2.repo.hu wrote:
>> Long term we are going to replace the whole DRC. We already have big parts 
>> of that code in production (for the advanced search).
>> Such drc scripts will have no problem understanding an antenne loop.
>> 
>> Short term we can add a temporary "no-drc" flag to one of the objects 
>> consisting the loop.
>
>
> There is still some thinking of how to netlist it needed.  Subcircuits can be 
> used to repeat wanted layouts
> in multi channel amps for instance, and then the DRC needs to go into the 
> subcircuit to work as intended.
>
> Whether to "go into" a subcircuit is going to be a decision of the user more 
> than a heuristic
> choice by pcb-rnd.  Unless you have more AI smarts planned that I imagine.
>
> Subcircuits with more generic layout in them seem to demand that internal nets 
> are brought up to the next higher level when they involve solid connections of 
> copper trace, and so why not DRC those as usual and update the top netlist
> to work with all the lower level parts up until you get to components that are 
> a black box.  Black box components
> are not treated as a short, and only checked that they are hooked up in 
> correct pin order to other Black box components via the netlist.
>
> The new thing here is a subcircuit is not always a black box, but can be 
> either that old way, or a circuit that causes some connectivity changes at the 
> next level up from it.
 
I think we should postpone these; the main goal is to fix up the footprint 
model, not to support hierarchic netlists and stuff like that. Which 
doesn't mean the feature won't eventually grow strong enough to do that, 
but it certainly won't happen any time soon.
 
Just replacing the current footprint implementation with _anything else_ 
will cost at least a hundred hour of development.
 
Why I am not worried about netlist details yet, is:
 
1. the main goal now is to replace special cased footprints with generic 
ones; which means we won't have subcircuit-in-subcircuit 
(footprint-in-footprint) in the first iteration. If we manage to do only 
the footprint model fixup, and somehow fail on every other future aspects, 
we already made a huge step forward.
 
2. Whenever we decide to have that recursion, how we handle the netlist 
is mostly a netlist question, it won't require too much support or 
change in subcirctuits. I can't imagine bad design decisions about 
subcircuits now could seriously affect the netlist interfacing later. (The 
harder part is the layer mapping in such a recursion)
 
3. there's a popular demand for hierarchical netlists, I suspect that 
would pretty easily just click in with hierarchical subcircuits. I also 
like your blakc box idea. But I am pretty sure we won't get near to these 
any time soon unless I get a full time job at pcb-rnd, lol.
 
Regards,
 
Igor2
 

Reply subtree:
711 Re: [pcb-rnd] up next: subcircuits (a.k.a. footprint model from ge...@igor2.repo.hu
  712 Re: [pcb-rnd] up next: subcircuits (a.k.a. footprint model redesign) from John Griessen <jo...@cibolo.com>