Mailing list archives : pcb-rnd

ID:5648
From:Gabriel Paubert <pa...@iram.es>
Date:Mon, 16 May 2022 12:52:34 +0200
Subject:Re: [pcb-rnd] RFC: multi-sheet netlist
in-reply-to:5647 from pc...@cuvoodoo.info
replies: 5655 from pc...@cuvoodoo.info
 
--5cd54PRfmeQw3Wq6
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
 
	Hi,
 
I just put the appended file in my designe directory. This eliminates
all the prefixes in the netlist generation.
 
It is not perfect but works reasonably well for moderate size designs
(~10 schematic pages).
 
	Gabriel
 
On Mon, May 16, 2022 at 12:25:41PM +0200, pcb-rnd@cuvoodoo.info wrote:
> gEDA/gschem and lepton-eda/schematic support hierarchical design (with multiple/sub-sheets).
> this is explained in http://wiki.geda-project.org/geda:faq-gschem?s[]=gtag&s[]=sch#can_gschem_do_hierarchical_designs_with_sub_sheets and an example is shipped with these software in gTAG.sch.
> 
> I tried for the first time this feature because may schematic became too large, unreadable (on one sheet), and parts are just repeated (e.g. multiple ports).
> but I have an issue with how netlist are handled with subsheets.
> I attached a basic example.
> In the tEDAx netlist, components have a unique refdes, using the "_sheet-refdes_/" prefix/path.
> pcb-rnd treats the name as a string, and does not have the concept of hierarchical design/name.
> thus when I reuse a component (with the same refdes) on multiple sheets (because the connection of one of the pins only makes sense in this sheet), then pcb-rnd imports multiple times the footprint (one for each name, which includes the path).
> this component re-use also applies to multi-part symbols (e.g. dual-opamp).
> 
> the same prefixing is applied to netnames.
> thus the GND symbols (using the GND netname) are not interconnected across sheets (this also applies to the provided gTAG.sch example).
> 
> a kind of solution is to use pins on the symbol for the subsheet, and use and INPUT/OUTPUT symbols in the subsheet.
> but doing it for all nets (e.g. VCC/GND) just clutters the sheet symbol, and kind of goes against the concept of defining/using netnames.
> plus, this does not solve the refdes reuse issue.
> 
> for now my solution is to use a netlist intermediate (pcb-rnd will not import the schematic directly), and have a script that removes all prefix/path.
> but maybe I just did not understand correctly how to do proper hierarchical design (I really did not find a lot of documentation).
> maybe tEDAx can be extended to integrate the concept, or interpret the '/' in the name.
> any comments/suggestion is welcome.
 
 
 
 
--5cd54PRfmeQw3Wq6
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename=gnetlistrc
 
; hierarchy-uref-mangle string
;
; Controls if uref names are mangled to make them uniq when traversing
; down into the hierarchy.  If this is disabled then urefs are not changed
; and it is the user's responsibility to make sure they are unique.
; If you disable this, you really are taking your netlist's life into your
; own hands.  You *MUST* have unique urefs throughout the entire hierarchy
; or bad things might happen.  Also you cannot reuse underlying schematics.
;
;(hierarchy-uref-mangle "enabled")
(hierarchy-uref-mangle "disabled")
 
; hierarchy-netname-mangle string
;
; Controls if net names are mangled to make them uniq when traversing
; down into the hierarchy.  If this is disabled then the net names are not
; changed and it is the user's responsibility to make sure they are unique.
; If you disable this, you really are taking your netlist's life into your
; own hands.  This basically has the effect of making all same named nets
; in the entire hierarchy be electrically connected.  Hope you know what you
; are doing.
;
;(hierarchy-netname-mangle "enabled")
(hierarchy-netname-mangle "disabled")
 
; hierarchy-netattrib-mangle string
;
; Controls if net created by using the net= attribute are renamed to make
; them uniq when traversing down into the hierarchy.  If this is disabled
; then the net= created nets are not changed.  This feature is handy to have
; global nets which spawn the entire hierarchy (like power or ground nets).
; Please make sure you know what you are doing.
;
;(hierarchy-netattrib-mangle "enabled")
(hierarchy-netattrib-mangle "disabled")
 
;
; End of mode related keywords
;
 
--5cd54PRfmeQw3Wq6--
 

Reply subtree:
5648 Re: [pcb-rnd] RFC: multi-sheet netlist from Gabriel Paubert <pa...@iram.es>
  5655 Re: [pcb-rnd] RFC: multi-sheet netlist from pc...@cuvoodoo.info
    5656 Re: [pcb-rnd] RFC: multi-sheet netlist from Nicklas SB Karlsson <nk...@nksb.eu>
    5657 Re: [pcb-rnd] RFC: multi-sheet netlist from Roland Lutz <rl...@hedmen.org>
    5671 Re: [pcb-rnd] RFC: multi-sheet netlist from ka...@aspodata.se