| ID: | 4374 |
| From: | Majenko Technologies <ma...@majenko.co.uk> |
| Date: | Sat, 19 Sep 2020 09:48:40 +0100 |
| Subject: | Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan |
| in-reply-to: | 4373 from N <ni...@gmail.com> |
| replies: | 4376 from N <ni...@gmail.com> |
--000000000000c5cbd805afa6af8f Content-Type: text/plain; charset="UTF-8" For traces you can pack them nice and close. For pads you may want more clearance to allow for inaccuracies in the mask alignment which would be irrelevant for traces. On Sat, 19 Sep 2020, 09:13 N, <nicklas.karlsson17@gmail.com> wrote: > > ... > > > Of course, that makes > > >deciding on the right clearance tricky when you have a trace alongside a > > >pad... the trace would need to be 0.3mm away from the pad, even though > it's > > >specified as having 0.15mm clearance. Something that, if I read your > > >reasoning right, is not possible to display with the new DRC "on the > fly", > > >so could never be represented in the clearance cursor display. > > > > Exactly, not possible to indicate or enforce while editing, but trivial > to > > check by the DRC script. > > As I understand it. To display on the fly there must be some function > calculating clearance value on the fly. There is no such function now and > DRC is run afterwards. > > Are a little bit uncertain why there need to be specific distance between > different types of features, for me it make sense to set distance between > nets except possible in some special cases. > > > Adding a note to avoid confusion. In high voltage circuit clearance is > measured thru air while creepage is measured on circuit board. > > > Nicklas Karlsson > > > --000000000000c5cbd805afa6af8f Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable <div dir=3D"auto">For traces you can pack them nice and close. For pads you= may want more clearance to allow for inaccuracies in the mask alignment wh= ich would be irrelevant for traces.</div><br><div class=3D"gmail_quote"><di= v dir=3D"ltr" class=3D"gmail_attr">On Sat, 19 Sep 2020, 09:13 N, <<a hre= f=3D"mailto:nicklas.karlsson17@gmail.com">nicklas.karlsson17@gmail.com</a>&= gt; wrote:<br></div><blockquote class=3D"gmail_quote" style=3D"margin:0 0 0= .8ex;border-left:1px #ccc solid;padding-left:1ex">> ...<br> > > Of course, that makes<br> > >deciding on the right clearance tricky when you have a trace along= side a<br> > >pad...=C2=A0 the trace would need to be 0.3mm away from the pad, e= ven though it's<br> > >specified as having 0.15mm clearance. Something that, if I read yo= ur<br> > >reasoning right, is not possible to display with the new DRC "= ;on the fly",<br> > >so could never be represented in the clearance cursor display. <br= > > <br> > Exactly, not possible to indicate or enforce while editing, but trivia= l to <br> > check by the DRC script.<br> <br> As I understand it. To display on the fly there must be some function calcu= lating clearance value on the fly. There is no such function now and DRC is= run afterwards.<br> <br> Are a little bit uncertain why there need to be specific distance between d= ifferent types of features, for me it make sense to set distance between ne= ts except possible in some special cases.<br> <br> <br> Adding a note to avoid confusion. In high voltage circuit clearance is meas= ured thru air while creepage is measured on circuit board.<br> <br> <br> Nicklas Karlsson<br> <br> <br> </blockquote></div> --000000000000c5cbd805afa6af8f--
Reply subtree:
4374 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from Majenko Technologies <ma...@majenko.co.uk>
4376 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from N <ni...@gmail.com>