| ID: | 4373 |
| From: | N <ni...@gmail.com> |
| Date: | Sat, 19 Sep 2020 10:13:11 +0200 |
| Subject: | Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan |
| in-reply-to: | 4371 from ge...@igor2.repo.hu |
| replies: | 4374 from Majenko Technologies <ma...@majenko.co.uk> |
> ... > > Of course, that makes > >deciding on the right clearance tricky when you have a trace alongside a > >pad...=A0 the trace would need to be 0.3mm away from the pad, even thoug= h it's > >specified as having 0.15mm clearance. Something that, if I read your > >reasoning right, is not possible to display with the new DRC "on the fly= ", > >so could never be represented in the clearance cursor display.=20 >=20 > Exactly, not possible to indicate or enforce while editing, but trivial t= o=20 > check by the DRC script. As I understand it. To display on the fly there must be some function calcu= lating clearance value on the fly. There is no such function now and DRC is= run afterwards. Are a little bit uncertain why there need to be specific distance between d= ifferent types of features, for me it make sense to set distance between ne= ts except possible in some special cases. Adding a note to avoid confusion. In high voltage circuit clearance is meas= ured thru air while creepage is measured on circuit board. Nicklas Karlsson
Reply subtree:
4373 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from N <ni...@gmail.com>
4374 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from Majenko Technologies <ma...@majenko.co.uk>
4376 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from N <ni...@gmail.com>