| ID: | 4371 |
| From: | ge...@igor2.repo.hu |
| Date: | Sat, 19 Sep 2020 05:21:58 +0200 (CEST) |
| Subject: | [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan for optional |
| in-reply-to: | 4370 from Majenko Technologies <ma...@majenko.co.uk> |
| replies: | 4373 from N <ni...@gmail.com> |
This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --722076672-1103994053-1600485718=:2180 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 18 Sep 2020, Majenko Technologies wrote: >What would be nice, and this can probably already be done with the new DRC >system, though I wouldn't know how, is to differentiate between trace and >padstack clearances. For example, 0.15mm clearance for all traces minimum, >and 0.3mm clearance for all padstacks minimum. Some fab houses like to have >more clearance around pads than they allow for traces. That's easily possible: 1. you could keep the stock drc rule that is warning for less than 0.15mm 2. you could write a second drc rule that iterates over all padstacks and warn for less than 0.3mm gap to other nets However, you probably want to refine that requirement a bit: besides smd pads and thru-hole pins padstacks are also used for vias, fiducials and potentially other things. So maybe you want to limit the search for padstacks with term ID set, and/or padstacks with mask shape present, and/or padstacks with hole/slot present, depending on the reason your fab wants higher clearance. I can support you if you decide to write the script. Our zone based drc script is a real good starting point (and is a nice tutorial that explains how to write such scripts): http://repo.hu/cgi-bin/pool.cgi?cmd=show&node=drc_zone_clr I think deletign a few things from that script and using a different definition (setting) value would implement what you described. Then probably a few extra expressions to limit the search within padstacks, as I wrote above. > Of course, that makes >deciding on the right clearance tricky when you have a trace alongside a >pad... the trace would need to be 0.3mm away from the pad, even though it's >specified as having 0.15mm clearance. Something that, if I read your >reasoning right, is not possible to display with the new DRC "on the fly", >so could never be represented in the clearance cursor display. Exactly, not possible to indicate or enforce while editing, but trivial to check by the DRC script. >TBH that's no >big deal really, as long as it would flag up in the background checks that >something isn't quite right. Yes, it would. Best regards, Igor2 --722076672-1103994053-1600485718=:2180--
Reply subtree:
4371 [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan for optional from ge...@igor2.repo.hu
4373 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from N <ni...@gmail.com>
4374 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from Majenko Technologies <ma...@majenko.co.uk>
4376 Re: [pcb-rnd] DRC: different clearance for padstack (Was: Re: plan from N <ni...@gmail.com>