ID: | 3921 |
From: | Hannu Vuolasaho <vu...@msn.com> |
Date: | Sat, 4 Apr 2020 14:13:57 +0300 |
Subject: | Re: [pcb-rnd] drc: Different part of board, different rules |
in-reply-to: | 3899 from ge...@igor2.repo.hu |
replies: | 3922 from ge...@igor2.repo.hu |
On 2.4.2020 18.29, gedau@igor2.repo.hu wrote: > > On Thu, 2 Apr 2020, Hannu Vuolasaho wrote: > >> This may be obvious... >> >> When routing tight pitched BGA part, the rules are different than in the= power >> supply part of the board. Also fabs give better yield when boards have l= ooser >> routing. >> >> Some mechanism is needed to tell which rule set to use on different part= s of >> board, be it mask, coordinate or telepathic link. > > This doesn't seem to be a rule, but as you said, a mechanism. I can offer > three hypotetical solutions, examples tailored to your bga case: > > 1. net based > > This is not exactly what you described, but is somewhat close, and would > also be useful in other cases: > > the required clearance is not a constant, but is an expression that > somehow depends on which net a given object is in. Or in other words: > "bigger clearnace is required on high voltage PSU nets than on signals" o= r > in your bga case the fanout will affect a lot of signal nets that can hav= e > tighter rules while you keep the rest of the nets at normal rule. > > Bonus: this is trivial to implement with our existing stuff! This is the traditional net class idea. First gathering the rules for=20 different classes and then executing DRC on each class. I like this idea. The drawback is that for example power leaves from regulator and it=20 should be wide and have big clearances and then it spreads under the BGA=20 to many small parts. To work around this, classification should be on copper object. This is=20 just fine until the object is moved, extended or copied to wrong place=20 which leads to solution 2. > > 2. geometrical approach > > Create a new layer, let's call it drc zone. Draw polygons on this layer > over the bga fanout regions and assign attributes to them, e.g. > "zone=3Dfanout". > > Then copy your normal clearance rule script originally developed for the > whole board into two copies and disable the original rule. > > First copy, for the fanout: modify the clearance value in the check so it > warns only for a lower value; wrap the rule in an interation over all > polygons on the drc zone layer having the zone=3Dfanout attrib, then add = an > extra && expression that allows finding cases only if the currently > examined object overlaps with the drc zone poly. (In other words, this is > an expensive way of saying the rule should discard anything not under the > fanout poly; you better have only one poly like that, maybe with full pol= y > flag and multiple islands!) > > Second copy, for the normal case: similar modifcations, but leave the > normal clearance value and invert the && exression with the ! operator so > it lets the rule run on anything outside of the zone=3Dfanout region > > 3. solution 2, accelerated > > I recommend solution 1 only if I can work out how to make it run > efficiently. In its raw form it'd do much more searches than needed, > making this drc check very slow in big/complex boards. So if we choose > this one, I will need to figure what kind of C code accelerations I shoul= d > implement that doesn't take away from the flexibility (doesn't hardwire > the whole thing in C) but speeds it up. > > > What do you think? Solution 2. is extension what I had in my mind. I thought having=20 rectangles :) First thing which comes to my mind is that who wins if there are two=20 different rule polygons intersecting. Second is bonus: zone=3Dnodrc so that DRC can be run on partially done=20 board when the undone part is just a mess or already done part where DRC=20 would take ages like a power supply are made with polygons. Actually I=20 don't know if this is even possible. I this possible optimization strategy? Could the rule selection be done first and not when making the check?=20 copy rules, split=C2=A0 targets temporarily if needed, link the rules and d= o=20 the real check? Both solutions have strengths and weaknesses and I like both. What to=20 implement is then choice of efficiency, speed and time. Vuokko
Reply subtree:
3921 Re: [pcb-rnd] drc: Different part of board, different rules from Hannu Vuolasaho <vu...@msn.com>
3922 Re: [pcb-rnd] drc: Different part of board, different rules from ge...@igor2.repo.hu
3926 Re: [pcb-rnd] drc: Different part of board, different rules from ge...@igor2.repo.hu
3928 Re: [pcb-rnd] drc: Different part of board, different rules from Britton Kerin <br...@gmail.com>
3929 Re: [pcb-rnd] drc: Different part of board, different rules from ge...@igor2.repo.hu
4050 Re: [pcb-rnd] drc: Different part of board, different rules - from ge...@igor2.repo.hu