| ID: | 3440 |
| From: | John Griessen <jo...@cibolo.com> |
| Date: | Sat, 12 Oct 2019 19:04:18 -0500 |
| Subject: | [pcb-rnd] non-graphical schematics, layout (was: Why focus on gtk?) |
| in-reply-to: | 3439 from Mychaela Falconia <my...@gmail.com> |
| replies: | 3441 from Mychaela Falconia <my...@gmail.com> |
On 10/12/19 6:35 PM, Mychaela Falconia wrote: > I now use the structural subset of > Verilog as my design entry language, replacing graphical schematics, > plus my own MCL language for capturing component data, and once I got > this scheme properly working (early 2015 or so), I have never looked > back. Here is the ad hoc toolkit I use: > > https://www.freecalypso.org/hg/ueda-linux/ > > It can currently generate netlist outputs in PADS and geda-pcb netlist > import formats, thus I assume that it should work fine with pcb-rnd > too. Hi Mychaela, I know from past geda list discussions you prefer non-graphical net definition and maybe some kind of scripted non-GUI data entry for layout. Are you thinking of using pcb-rnd to gen layout from commands driven by your own AI-like logic? You've got the motivation -- could turn into a really whole world valuable AI app if you tuned it. Another way your work could go to wide use is the component database function that must be part of your "capturing component data" method. Do you think some of that could be useful for us GUI drivers also?
Reply subtree:
3440 [pcb-rnd] non-graphical schematics, layout (was: Why focus on gtk?) from John Griessen <jo...@cibolo.com>
3441 Re: [pcb-rnd] non-graphical schematics, layout (was: Why focus on gtk?) from Mychaela Falconia <my...@gmail.com>
3442 Re: [pcb-rnd] non-graphical schematics, layout from John Griessen <jo...@cibolo.com>