| ID: | 2953 |
| From: | ge...@igor2.repo.hu |
| Date: | Fri, 19 Apr 2019 19:08:17 +0200 (CEST) |
| Subject: | Re: [pcb-rnd] bug: no DRC violation between trace and via |
| in-reply-to: | 2951 from Peter Stuge <pe...@stuge.se> |
On Fri, 19 Apr 2019, Peter Stuge wrote: >When I run DRC on the attached file I get no violation, even though >copper is a lot closer than required minimum clearance 0.5mm. Hm. Thanks, added to the TODO. Looks like our padstack<->line distance calculation is off.
Reply subtree:
2953 Re: [pcb-rnd] bug: no DRC violation between trace and via from ge...@igor2.repo.hu