pcb-rnd knowledge pool
Thermal style bits
thermal_styles by Tibor 'Igor2' Palinkas on 2021-09-14 | Tags: insight, thermal, style, diagonal, round, sharp, noshape |
Abstract: Pcb-rnd supports hardwired thermal styles for automatically calculated thermals. The shape of the thermal depends on a few bits, while sizes depend on clearance and a global. This pool node shows how thermal style bits are presented.
Internal representation
Padstacks have 4 bits per layer for setting the thermal style. This is per padstack reference data, not per prototype data, so different instances of the same prototype can have different polygon connections. The thermal bits are per layer, not per layer group, so a single layer group can host "split planes" by having two polygons on two different layers and padstacks clearing into both polygons can make connection to one polygon having full clearance in the other.
Plain layer objects (such as lines) have the same thermal styles represented by the same 4 bits. Thermal happens within the parent layer of the object.
Thermal style bits are defined in type pcb_thermal_t. The shape of the thermal is one of:
name | val | description |
---|---|---|
PCB_THERMAL_NOSHAPE | 0 | padstack only: no copper shape shall be drawn (hole/slot is preserved, clearance is calculated around hole/slot) |
PCB_THERMAL_ROUND | 1 | 4 rounded spokes |
PCB_THERMAL_SHARP | 2 | 4 sharp spokes |
PCB_THERMAL_SOLID | 3 | solid connection (no clearance between object copper and the sorrunding polygon) |
If the shape is round or sharp, the spokes are normally horizontal and vertical, but if PCB_THERMAL_DIAGONAL (value 4) is OR'd to the thermal value, the spokes are rotated 45 degrees.
Finally, the default state is "no thermal", which means the object has full clearance to any polygon. Any of the above bits take effect only if PCB_THERMAL_ON (value 8) is OR'd to the thermal value.
Graphical representation
via number | bits |
---|---|
1 | PCB_THERMAL_ON is not set, no thermal applied |
2 | PCB_THERMAL_ON | PCB_THERMAL_ROUND | PCB_THERMAL_DIAGONAL |
3 | PCB_THERMAL_ON | PCB_THERMAL_ROUND |
4 | PCB_THERMAL_ON | PCB_THERMAL_SHARP | PCB_THERMAL_DIAGONAL |
5 | PCB_THERMAL_ON | PCB_THERMAL_SHARP |
6 | PCB_THERMAL_ON | PCB_THERMAL_SOLID |
7 | PCB_THERMAL_ON | PCB_THERMAL_NOSHAPE |
In the property editor
The property editor has a subtree called padstack/thermal/lid where a short string representation of the above bits can be found per internal layer ID. These strings are printed under vias on the above image. If the string is empty, thermal is not active. 'o' means round, 'x' means sharp, '@' means solid connecton and 'n' means no-shape. Round and sharp may have a 'd' suffix for diagonal.
Note: layers are addressed by internal layer IDs in this subtree because layer names are not guanrateed to be unique.
In query()
The same padstack.thermal.lid subtree is available in query(). For syntactical reasons integers in the property path need to be protected by parenthesis. For example propedit padstack/thermal/lid/2 is thermal.lid.(2) in query().
Example:
@.thermal.lid.(1) ~ "x"
will return true if @ is a padstack and has sharp (diagonal or not) thermal implemented on layer ID 1.
Alternatively the thermal_on() query function can be used where the second argument is a layer object. Layers can be listed using the layerlist() function and the list can be filtered by type/location/name.
In advanced search
Because this subtree depends on the current layer stack, the advanced search does not deliver it at the moment.
In the padstack editor
The padstack editor dialog (right click context menu over the padstack, edit geometry/prototype) has a list of thermals on its first tab for padstack instances. This table lists layers by name on the left and thermal style by long name on the right.