pcb-rnd knowledge pool

 

Index: using and creating footprints

Ifootprint by Tibor 'Igor2' Palinkas on 2017-12-25	Tags: index, footprint, library, lib, subcircuit
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Abstract: n/a

 

Using existing footprints

Using footprints has three main aspects: library (how/where to get the footprints) and importing from schematics .

Library

Pcb-rnd has a modularized library support: differnet fp_ plugins access local and remote footprint libraries differenlty. At the end all footprints are accessible through a unified runtime library. Related nodes:

• pcblib - insight on how the lib shipped with pcb-rnd was designed
• fp_wget - tips on using remote footprint libs over HTTP
• parametric - introduction to parametric footprints
• library_t - insight on how deep the runtime library can get

Importing from schematics

When a raw netlist is imported, no footprints are placed, only the netlist is initialized. In an "import schematics", both netlist and footprint data is imported.

How to design footprints

Technically

Drawing a footprint is creating a subcircuits . A subcircuit is a generic grouping mechanism that is also used as the footprint implementation in pcb-rnd. Related nodes:

• tutorial on building a subcircuit
• finished subcircuits are normally put in a local footprint library ; this is most often done by simply saving the file and copying it into a directory that is then added to the library search path in the preferences window
• once a subcircuit is placed in a board the subcircuit lock applies to its parts, keeping the subcircuit intact, but the the loose subc option allows editing it
• subcircuit files can be open by pcb-rnd directly, e.g. pcb-rnd footprint.lht and then pcb-rnd will be in a "footprint editor mode" where you can freely modify the footprint and save it as a footprint
• footprints typically need a refdes text

Details to consider

There are a lot of fine details to consider when designing a footprint:

• Origins of the subcircuit:
  • there's an origin by the subcircuit is grabbed when placed from the library, marked with a diamond (rhombus) sign on screen
  • by default that's also the pick-and-place origin in some cases; it can be overridden by manually specifying a pick-and-place origin point
• Terminal geometry: padstack design considerations (board density, soldering aspects)
• Terminal numbering ; terminals have to be numbered and this numbering has to match the schematic symbol's numbering (or there must be a device mapping layer in the workflow)
• documentation layers: what to draw on silk, what to draw on assembly or fab layers; best practice: do not overload the silk layer with drawings/doc that are not really useful when printed on the board
• keepout layers: both for documentation and getting the drc check for overlapping footprints

Terminals can be numbered by hand, using the {e t} keys over the terminal, or using scripts such as the termnum script, available from edakrill.

Padstack design

Terminals of a footprint is most commonly created using padstacks. Padstacks are constructed and broken up in a very similar way to subcircuits.

When designing a padstack, you should consider:

• board density: on dense boards, smaller pads are recommended (but that may be harder or more expensive to poppulate)
• copper geometry:
  • for manual soldering, you may want larger copper shape on the side facing the technicial so it is easier/faster to solder the pin
  • thru-hole pins and vias should normally have a copper ring on all copper layers
  • in case of smallish SMD parts, especially passives, the wrong copper pad size can lead to thombstoning
  • sometimes the first terminal of a footprint is marked by slightly different pad geometry (e.g. square instead of round for thru-hole); but this may interfere with board density or high-speed/high-freq requirements
• mask shape:
  • has to be drawn explicitly!
  • most pins and pads normally need a mask shape, else solder mask will cover the pad and the pin/lead can not be soldered
  • the mask normally needs to be a bit larger than the copper shape, to compensate for mask misalignment
  • it's usually a safe bet to generate the mask shape from copper shape using the derive button in the padstack editor
• paste shape:
  • typically used on SMD pads only
  • has to be drawn explicitly!
  • should be as big as, or smaller than the copper shape
  • it's usually a safe bet to generate the mask shape from copper shape using the derive button in the padstack editor
  • some pads, like the central pad of a qfn, may require a pattern of smaller paste blobbs; a padstack can create only a single paste shape per paste layer; a pattern should be drawn separately, e.g. as polygons on the paste layer (within the same subcircuit)
  • at certain sizes, it is best practice to use chamfed or round corner paste patterns so paste doesn't stick in the sharp corner
• hole or slot:
  • a thru-hole pin has either a hole or a slot in the padstack; hole is always circular (for a "pin" which is circular or square), slot can be of any shape, typically it's a round cap line (for a "tab")
  • a circular hole is created by specifying the diameter (in the padstack editor)
  • a slot is created by drawing the shape on a boundary or mech layer while constructing the padstack
  • the hole/slot for a metal pin/tab is almost always plated; plating is a single bit data you can toggle in the padstack editor
  • the hole/slot for a plastic/positioning pin or for a mounting hole is typically unplated; plating is a single bit data you can toggle in the padstack editor
  • values and geometry in pcb-rnd generally refers to finished values; that is, a plated hole with 0.8mm diameter means the diameter of the finished hole (the inner diameter of the copper pipe) is 0.8mm, and the fab had to use a larger drill to compensate for plating (the copper pipe's wall thickness)
  • in theory a footprint can contain padstacks with blind/burried holes, but that's not common in practice