pcb-rnd knowledge pool

Abstract: How to load Eagle binary files in pcb-rnd.

  Further work has gone into pcb-rnd's

trunk/src_plugins/io_eagle/*

import/output plugin for Cadsoft Eagle layouts.

as a result, pcb-rnd can now import:

• Eagle XML format layouts (.brd), i.e. version 6 and up, including netlist
• Footprints in Eagle XML format libraries (.lib)
• Eagle binary format layouts (.brd), i.e. versions 3, 4 and 5, including netlist
• Footprints in Eagle binary format libraries (.lib)

With this new capability, existing OSHW designs and user contributed parts libraries can remain in the information commons without being fenced off by new changes to Eagle licensing.

As an example, here is the VK3AJG BC547 80m SSB transceiver design, loaded from an Eagle binary format layout (.brd) file made available by G4USP :

and here is a manufacturer supplied footprint for a 50mil spaced header that was only available in an Eagle binary library format:

and here is the same header after being exported in Kicad format and loaded into pcbnew:

And here is the legendary TV-be-gone PCB, found in Eagle binary format, and loaded into pcb-rnd:

These new capabilities are in SVN head currently, but will be in the next pcb-rnd package release due shortly.

Caveats include:

• Eagle's occasional use of net names which are invalid in pcb-rnd, i.e. '-' for the ground net. These are changed to 'GND' on load if present.
• Eagle's allows an element to be named '-', i.e. for a ground terminal. These are changed to 'HYPHEN' on load.
• Thermals for features are indirectly defined in the Eagle file format with electrical nets, so thermals are not automatically generated on import at this point in time, but this could be implemented with more work, subject to user demand.
• Further to this, an element, i.e. a decoupling capacitor, may have no clearance for one pin on a GND copper polygon, and the other pin may have no clearance for a VCC copper polygon. This can be achieved with padstacks, but the simpler option is to remove one of the pours, sort out the clearance on one of the pins for the remaining plane and proceed to connect the other pin based on the rat lines/DRC.
• tDocu and bDocu layer features in elements are currently combined with silk layer features. Once pcb-rnd subcircuit refactoring is complete in the next development cycle, footprints will be able to support both silk and documentation layer features and the import-export plugins will be upgraded accordingly.

A loaded layout or library can be modified and/or saved in pcb-rnd's native file format, or exported into other supported formats which include:

• Kicad s-expression and legacy
• Protel Autotrax
• gEDA PCB
• FidoCadJ

allowing pcb-rnd to provide Eagle->gEDA PCB, Eagle->Kicad and Eagle->Protel Autotrax conversion if required, subject to any feature limitations in the target formats.

As with any of the other layout formats supported by pcb-rnd, an Eagle binary layout can be also be nominated for use as a library in pcb-rnd's preferences.

In closing, with native support for both Eagle layouts and libraries in pcb-rnd, the need for external utilities such as eagle2gedapcb or translate2geda or the various ulp scripts in existence for exporting to foreign formats from within Eagle is much reduced. It should also be noted that pcb-rnd can be run headless, allowing batch conversion of files from the command line.

Thanks also to LA3PNA for his help with example files!!